Satnews Daily
December 11th, 2019

Creonic's SATCOM IP Core Portfolio Extended

Creonic GmbH has announced updates and improvements, as well as new IP cores, for SATCOM.

Noteworthy improvements to the existing portfolio include:

  • [DVB-S2X] The DVB-S2X Demodulator achieves better performance across all Modcods. Performance was improved in particular for the SNR range below 0 dB.
  • The DVB-S2X LDPC/BCH Decoder now achieves higher maximum clock frequencies and was, in addition, extended by BBHeader-CRC and Frame-CRC checks.
  • A new version of the DVB-S2X Modulator offers support for the VLSNR (Very-Low SNR) profile, Frame-CRC insertion, variable symbol rate, and an optional IF-mixer.
  • [DVB-RCS2] The DVB-RCS2 Modulator IP core now supports spread-spectrum waveforms.


Recently released IP cores in the context of satellite communication include:

  • The CCSDS SCCC Turbo Encoder and Decoder allow for symbol rates beyond 300 MBaud on state-of-the-art FPGAs. They offer support for all 27 ACM formats defined in the standard.
  • For validation purposes Creonic uses an AWGN channel IP core that we now offer for licensing. It offers parameterizable throughput and quantization.


Additional features and IP cores are on the way:

  • The DVB-S2X Demodulator will gain support for VLSNR waveforms in Q2/2020.
  • A DVB-RCS2 demodulator IP core will be released in the mid of 2020.


The IP core portfolio is available for ASIC and FPGA (Xilinx and Intel) technologies either as VHDL source code or as encrypted netlist. In addition, the cores come with HDL simulation models, VHDL testbench, bit accurate Matlab, C or C++ simulation model and comprehensive documentation.