To protect on-board memory resources from radiation, the S950-02 has 128 megabytes of triple-redundant SDRAM with three bits per cell. On the rad-tolerant FPGA, a voting mechanism performed only on the read cycle allows for data correction before sending to the CPU or PowerPC bus. One megabyte of dual-redundant boot Flash stores the on-board Boot firmware and ensures full data integrity in the event of corruption during the boot-up sequence. Complementary memory resources consist of 64 megabytes of ECC-protected user flash with optional Flash FileSystem Driver (FFD) software to implement a file system. The high-integrity internal L1 and L2 cache, 32 kilobits and 1 megabyte respectively, both have parity checks on tags and data arrays, with an ECC check on data arrays in the L2 cache. The board's 32-bit/33 MHz PCI local bus that supports single and burst transfers provides connection to peripheral I/O via a 32-bit PMC slot to allow fast access between PCI I/O devices and the host processor. The cPCI bus enables the S950-02 to be configured as a standard cPCI board or a Slot 1 system controller where it can support up to seven additional cPCI boards with built-in clock signals as well as distribution and bus arbitration control.
Satnews Daily
May 26th, 2009
Totally Rad Hardened SBC For Spatial Summing
Aitech Defense Systems Inc. is introducing the radiation hardened S950-02 single board computer for spacecraft avionics.
The 3U CompactPCI 1 GHz rad hard embedded computer is an enhanced version of the Aitech space-flown S950 single board computers with increased processing power and data throughput. Using the PowerPC 750GX embedded processor for space avionics, the conduction-cooled S950-02 consumes less than 10 Watts and tolerates an unshielded total ionization radiation dose of more than 15 kilorads. The embedded systems computer is for space embedded computing applications including low Earth orbit, Mars terrestrial, and geostationary Earth orbit. These embedded processors have a single event upset (SEU) rate of less than one upset per 900 days of operation in low Earth orbit. This makes the board suitable for harsh environment, mission-critical systems including redundant mission computers, flight guidance and navigation computers, command and data handling computers, as well as in solid state recorders, video controllers, and manipulation controllers.
To protect on-board memory resources from radiation, the S950-02 has 128 megabytes of triple-redundant SDRAM with three bits per cell. On the rad-tolerant FPGA, a voting mechanism performed only on the read cycle allows for data correction before sending to the CPU or PowerPC bus. One megabyte of dual-redundant boot Flash stores the on-board Boot firmware and ensures full data integrity in the event of corruption during the boot-up sequence. Complementary memory resources consist of 64 megabytes of ECC-protected user flash with optional Flash FileSystem Driver (FFD) software to implement a file system. The high-integrity internal L1 and L2 cache, 32 kilobits and 1 megabyte respectively, both have parity checks on tags and data arrays, with an ECC check on data arrays in the L2 cache. The board's 32-bit/33 MHz PCI local bus that supports single and burst transfers provides connection to peripheral I/O via a 32-bit PMC slot to allow fast access between PCI I/O devices and the host processor. The cPCI bus enables the S950-02 to be configured as a standard cPCI board or a Slot 1 system controller where it can support up to seven additional cPCI boards with built-in clock signals as well as distribution and bus arbitration control.
To protect on-board memory resources from radiation, the S950-02 has 128 megabytes of triple-redundant SDRAM with three bits per cell. On the rad-tolerant FPGA, a voting mechanism performed only on the read cycle allows for data correction before sending to the CPU or PowerPC bus. One megabyte of dual-redundant boot Flash stores the on-board Boot firmware and ensures full data integrity in the event of corruption during the boot-up sequence. Complementary memory resources consist of 64 megabytes of ECC-protected user flash with optional Flash FileSystem Driver (FFD) software to implement a file system. The high-integrity internal L1 and L2 cache, 32 kilobits and 1 megabyte respectively, both have parity checks on tags and data arrays, with an ECC check on data arrays in the L2 cache. The board's 32-bit/33 MHz PCI local bus that supports single and burst transfers provides connection to peripheral I/O via a 32-bit PMC slot to allow fast access between PCI I/O devices and the host processor. The cPCI bus enables the S950-02 to be configured as a standard cPCI board or a Slot 1 system controller where it can support up to seven additional cPCI boards with built-in clock signals as well as distribution and bus arbitration control.